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Vue d'ensemble
G茅nie 茅lectrique : The place of logic synthesis in microelectronics. Representations of Boolean functions: logic covers, binary decision diagrams. Two-level synthesis algorithms, Espresso. Multi-level synthesis to Boolean networks: don't care methods, algebraic optimizations, delay modelling. Sequential synthesis: state-based optimizations, state assignment, network optimizations. Technology mapping: library cell and FPGA mapping.
Terms: Hiver 2011
Instructors: Zilic, Zeljko (Winter)
- (3-2-4)
- Prerequisite: ECSE 323